Since the invention of integrated circuits, the semiconductor industry has experienced continuous rapid growth due to constant improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, allowing more components to be integrated into a given chip area.
These integration improvements are essentially two-dimensional (2D) in nature, in that the volume occupied by the integrated components is essentially on the surface of the semiconductor wafer. Although dramatic improvements in lithography have resulted in considerable improvements in 2D integrated circuit formation, there are physical limitations to the density that can be achieved in two dimensions. One of these limitations is the minimum size needed to make these components. Also, when more devices are put into one chip, more complex designs are required.
An additional limitation comes from the significant increase in the number and length of interconnections between devices as the number of devices increases. When the number and length of interconnections increase, both circuit RC delay and power consumption increase.
Among the efforts for resolving the above-discussed limitations, three-dimensional integrated circuit (3DIC) and stacked dies are commonly used. Through-silicon vias (TSV) are often used in 3DIC and stacked dies for connecting dies. In this case, TSVs are often used to connect the integrated circuits on a die to the backside of the die. In addition, TSVs are also used to provide short grounding paths for grounding the integrated circuits through the backside of the die, which is typically covered by a grounded metallic film.
FIG. 1 illustrates a stacked die structure with die 10 stacked on die 12, wherein dies 10 and 12 are electrically connected through solder balls 16. Die 12 includes TSVs 14, which extend all the way from the back surface (facing top) to the front surface (facing down) of die 12. TSVs 14 are further electrically connected to solder balls 18, which may be used to mount the stacked die structure onto a package substrate or a motherboard. Through TSVs 14, die 10 can not only be connected to die 12, but also to solder balls 18 directly.
TSVs 14 may be used as signal paths or grounding paths, and relatively great currents may be conducted through them. The currents flowing through TSVs 14 may thus have cross-talk with the integrated circuits in die 12. The cross-talk may become severe enough to cause noticeable performance degradation in die 12, particularly if the integrated circuits in die 12 include analog circuits, or the integrated circuits are operated at high frequencies. Solutions are thus needed to at least reduce the cross-talk.